[Solution logicielle]: ESP32-C5
[Bande de fréquence de fonctionnement]:2,4 GHz/5 GHz
[Portée]:280 m
[Type d'antenne]:Carte de circuit imprimé intégrée
[Dimensions]:18 * 27,5 * 3,3 mm
[Introduction]:Le module E101-C5WN8-PS est un module Wi-Fi 6 + Bluetooth 5.0 double bande polyvalent, basé sur la puce ESP32-C5. Il offre une communication double bande 2,4 + 5 GHz, une connectivité étendue, 8 Mo de mémoire flash embarquée et un processeur monocœur RISC-V 32 bits. La puce intègre de nombreux périphériques, notamment des E/S à usage général (GPIO), des interfaces SPI et parallèles, des interfaces UART, I2C et I2S, un capteur de température, un moniteur de sous-tension, un comparateur de tension analogique et des temporisateurs. Il trouve des applications dans la domotique, l'automatisation industrielle, le secteur de la santé et l'électronique grand public.
| name | Serial Number | type | Function |
| GND | 1 | P | Grounding |
| 3V3 | 2 | P | powered by |
| IN | 3 | I | High level: Chip enabled; Low level: Chip disabled; Note that the EN pin must not be left floating. |
| IO2 | 4 | I/O/T | MTMS, GPIO2, LP_GPIO2, LP_UART_RTSN, LP_I2C_SDA, ADC1_CH1, FSPIQ |
| IO3 | 5 | I/O/T | MTDI, GPIO3, LP_GPIO3, LP_UART_CTSN, LP_I2C_SCL, ADC1_CH2 |
| IO0 | 6 | I/O/T | GPIO0, XTAL_32K_P, LP_GPIO0, LP_UART_DTRN |
| IO1 | 7 | I/O/T | GPIO1, XTAL_32K_N, LP_GPIO1, LP_UART_DSRN, ADC1_CH0 |
| IO6 | 8 | I/O/T | GPIO6, LP_GPIO6, ADC1_CH5, FSPICLK |
| IO7 | 9 | I/O/T | GPIO7, LP_GPIO7, FSPID, SDIO_DATA1 |
| IO8 | 10 | I/O/T | GPIO8, PAD_COMP0, SDIO_DATA0 |
| IO9 | 11 | I/O/T | GPIO9, PAD_COMP1, SDIO_CLK |
| IO10 | 12 | I/O/T | GPIO10, FSPICS0, SDIO_CMD |
| IO13 | 13 | I/O/T | GPIO13, USB_D-, SDIO_DATA3 |
| IO14 | 14 | I/O/T | GPIO14, USB_D+, SDIO_DATA2 |
| IO28 | 15 | I/O/T | GPIO28 |
| IO5 | 16 | I/O/T | MTDO, GPIO5, LP_GPIO5, LP_UART_TXD, ADC1_CH4, FSPIWP |
| IO4 | 17 | I/O/T | MTCK, GPIO4, LP_GPIO4, LP_UART_RXD, ADC1_CH3, FSPIHD |
| IO27 | 18 | I/O/T | GPIO27 |
| NC/IO15 | 19 | I/O/T | SPICS1, GPIO153 |
| NC | 20 | - | Empty pin |
| IO23 | 21 | I/O/T | GPIO23 |
| NC | 22 | - | Empty pin |
| IO24 | 23 | I/O/T | GPIO24 |
| RX0 | 24 | I/O/T | U0RXD, GPIO12 |
| TX0 | 25 | I/O/T | U0TXD, GPIO11 |
| IO25 | 26 | I/O/T | GPIO25 |
| IO26 | 27 | I/O/T | GPIO26 |
| GND | 28 | P | Grounding |
| EPAD | 29 | P | Grounding |
Note:
1. P: Power supply; I: Input; O: Output; T: Can be set to high impedance.
2. In modules with integrated SPI PSRAM, this pin is used as SPICS1 of the SPI PSRAM and cannot be used for other functions; in modules without integrated SPI PSRAM, this pin can be used as GPIO15.
3. EPADs do not need to be soldered to the base plate, but soldering them to the base plate's GND will provide better heat dissipation. If you want to solder the EPADs to the base plate, please ensure you use an appropriate amount of solder paste to avoid excessive solder paste causing too much distance between the module and the base plate, which will affect the fit between the pins and the base plate.
4. To ensure proper power supply to the ESP32-C5 chip during power-up, an RC delay circuit needs to be added to the EN pin. The recommended values for RC are typically R=10 kΩ and C=1µF, but the specific values still need to be adjusted according to the power-up sequence of the module power supply and the power-up/reset sequence of the chip. For details on power-up requirements, please refer to the ESP32-C5 chip manual.
5. For detailed pinouts and applications, please refer to the "ESP32-C5 Series Chip Technical Specifications" and the "ESP32-C5 Technical Reference Manual".