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E101-C5WN8-PS-TB Trousse de test pour module Wi-Fi double bande

[Interface]:USB

[Puce]: ESP32-C5

[Dimensions]:52,9 × 25,4 mm

[Introduction]:La carte de développement E101-C5WN8-PS-TB est un modèle d'entrée de gamme équipé d'un module Wi-Fi double bande 2,4 GHz + 5 GHz haute performance (E101-C5WN8-PS). Elle offre une connectivité Wi-Fi et Bluetooth Low Energy complète, et la plupart des broches du module sont accessibles par des connecteurs latéraux, permettant ainsi aux développeurs de connecter facilement divers périphériques à l'aide de cavaliers. Cette carte peut aussi être utilisée sur une plaque d'essai.

PIN
Pin number Pin Name type Pin Applications
1 3V3 P 3.3V power supply
2 CHIP_PU I High level: Chip enabled; Low level: Chip disabled.
3 IO2 I/O/T MTMS, GPIO2, LP_GPIO2, LP_UART_RTSN, LP_I2C_SDA, ADC1_CH1, FSPIQ
4 IO3 I/O/T MTDI, GPIO3, LP_GPIO3, LP_UART_CTSN, LP_I2C_SCL, ADC1_CH2
5 IO0 I/O/T GPIO0, XTAL_32K_P, LP_GPIO0,LP_UART_DTRN
6 IO1 I/O/T GPIO1, XTAL_32K_N, LP_GPIO1, LP_UART_DSRN, ADC1_CH0
7 IO6 I/O/T GPIO6, LP_GPIO6, ADC1_CH5, FSPICLK
8 IO7 I/O/T GPIO7, FSPID, SDIO_DATA1
9 IO8 I/O/T GPIO8, PAD_COMP0, SDIO_DATA0
10 IO9 I/O/T GPIO9, PAD_COMP1, SDIO_CLK
11 IO10 I/O/T GPIO10, FSPICS0, SDIO_CMD
12 IO26 I/O/T GPIO26
13 IO25 I/O/T GPIO25
14 VCC_5V P 5V power supply
15 GND G Grounding
16 NC Empty pin
17 G G Grounding
18 TX I/O/T U0TXD, GPIO11
19 RX I/O/T U0RXD, GPIO12
20 IO 24 I/O/T GPIO24
21 IO 23 I/O/T GPIO23
22 IO  15 I/O/T GPIO15
23 IO  27 I/O/T GPIO27
24 IO  4 I/O/T MTCK,GPIO4,LP_GPIO4, LP_UART_RXD, ADC1_CH3, FSPIHD
25 IO  5 I/O/T MTDO,GPIO5,LP_GPIO5, LP_UART_TXD, ADC1_CH4, FSPIWP
26 NC Empty pin
27 IO  28 I/O/T GPIO28
28 GND G Grounding
29 IO14 I/O/T GPIO14, USB_D+, SDIO_DATA2
30 IO13 I/O/T GPIO13, USB_D-, SDIO_DATA3
31 GND G Grounding
32 NC Empty pin


Note:

1. P: Power supply or ground; I: Input; O: Output; T: Can be set to high impedance.

2. GPIO27 is used to drive RGB LEDs.

3. MTMS, MTDI, GPIO7, GPIO25, GPIO26, GPIO27, and GPIO28 are the strapping pins of the ESP32-C5 chip. During chip power-up and system reset, the strapping pins control chip functions based on their binary voltage values. For a detailed description and application of the strapping pins, please refer to the Startup Configuration section of the ESP32-C5 Technical Reference Manual.

4. In modules with integrated SPI PSRAM, NC/15 is used as SPICS1 and cannot be used externally; in modules without integrated SPI PSRAM, this pin can be used as GPIO15.